实验四74LS138实现全减器

74LS138实现全减器1、电路图：真值表：输入输出ABCVF0000000111010110111010001101001100011111F的逻辑表达式：FBAC=排V的逻辑表达式：()VBCABC=+?=()()()ABCABCABCABCABCABCABCVABCABCABCABCABFBCC+++?=排=+++=?=e证明：由真值表可知其中1247(,,)ABCABCABCABCFABmmmCm=+++=+++1237(,,)VABCABCABCABCABCmmmm=+++=+++U174LS138DY015Y114Y213Y312Y411Y510Y69Y77A1B2C3G16~G2A4~G2B5X12.5VX22.5VU2A74LS20NU2B74LS20NVCC5.0VFVABC