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©Copyright2014-2015Xilinx.Page1XC7A15TXC7A35TXC7A50TXC7A75TXC7A100TXC7A200T16,64033,28052,16075,520101,440215,360Slices2,6005,2008,15011,80015,85033,65020,80041,60065,20094,400126,800269,2002004006008921,1882,8882550751051353659001,8002,7003,7804,86013,140ClockResources555661025025025030030050012012012014414424045901201802407401111111111111111114448816-1,-2-1,-2-1,-2-1,-2-1,-2-1,-2-2L,-3-2L,-3-2L,-3-2L,-3-2L,-3-2L,-3-1,-2,-1L-1,-2,-1L-1,-2,-1L-1,-2,-1L-1,-2,-1L-1,-2,-1LPackage(3),(4)Dimensions(mm)CPG23610x10106(2)106(2)106(2)CSG32415x15210(0)210(0)210(0)210(0)210(0)CSG32515x15150(4)150(4)150(4)FTG25617x17170(0)170(0)170(0)170(0)170(0)SBG484/SBV48419x19285(4)FGG48423x23250(4)250(4)250(4)285(4)285(4)FBG484/FBV48423x23285(4)FGG67627x27300(8)300(8)FBG676/FBV67627x27400(8)FFG1156/FFV115635x35500(16)XMP086(v4.7)Notes:2.Representsthemaximumnumberoftransceiversavailable.Notethatthemajorityofdevicesareavailablewithouttransceivers.SeethePackagesectionofthistablefordetails.FootprintCompatibleSpeedGradesCommercialExtendedLogicResourcesIndustrialCLBFlip-FlopsCPG:0.5mmWire-bondchip-scale;CSG:0.8mmWire-bondchip-scale;FTG:1.0mmWire-bondfine-pitch;SBG/SBV:0.8mmLidlessflip-chip;FGG:1.0mmWire-bondfine-pitch;FBG/FBV1.0mmLidlessflip-chip;FFG/FFV:1.0mmFlip-chipfine-pitchLogicCellsMaximumDistributedRAM(Kb)BlockRAM/FIFOw/ECC(36Kbeach)TotalBlockRAM(Kb)CMTs(1MMCM+1PLL)4.DevicemigrationisavailablewithintheArtix-7familyforlikepackagesbutisnotsupportedbetweenother7seriesfamilies.3.Leadedpackageoptionavailableforallpackages.SeeDS180,7SeriesFPGAsOverviewfordetails.1.SupportsPCIExpressBase2.1specificationatGen1andGen2datarates.AvailableUserI/O:3.3VSelectIO™HRI/O(GTPTransceivers)Artix®-7FPGAsFootprintCompatibleEmbeddedHardIPResourcesDSPSlicesPCIe®Gen2(1)AnalogMixedSignal(AMS)/XADCConfigurationAES/HMACBlocksGTPTransceivers(6.6Gb/sMaxRate)(2)I/OResourcesMaximumSingle-EndedI/OMaximumDifferentialI/OPairsPartNumberMemoryResourcesArtix®-7FPGAsOptimizedforLowestCostandLowestPowerApplications(1.0V,0.95V,0.9V)©Copyright2014-2015Xilinx.Page2XC7K70TXC7K160TXC7K325TXC7K355TXC7K410TXC7K420TXC7K480T——XCE7K325TXCE7K355TXCE7K410TXCE7K420TXCE7K480T10,25025,35050,95055,65063,55065,15074,65065,600162,240326,080356,160406,720416,960477,76082,000202,800407,600445,200508,400521,200597,2008382,1884,0005,0885,6635,9386,7881353254457157958359554,86011,70016,02025,74028,62030,06034,380ClockResources6810610883004005003005004004001441922401442401921922406008401,4401,5401,6801,920111111111111111111111881624163232-1,-2-1,-2-1,-2-1,-2-1,-2-1,-2-1,-2-2L,-3-2L,-3-2L,-3-2L,-3-2L,-3-2L,-3-2L,-3-1,-2-1,-2,-2L-1,-2,-2L-1,-2,-2L-1,-2,-2L-1,-2,-2L-1,-2,-2LPackage(3)Dimensions(mm)FBG484/FBV48423x23185,100(4)185,100(4)FBG676/FBV67627x27200,100(8)250,150(8)250,150(8)250,150(8)FFG676/FFV67627x27250,150(8)250,150(8)250,150(8)FBG900/FBV90031x31350,150(16)350,150(16)FFG900/FFV90031x31350,150(16)350,150(16)FFG901/FFV90131x31300,0(24)380,0(28)380,0(28)FFG1156/FFV115635x35400,0(32)400,0(32)XMP085(v3.8)FBG/FBV:1.0mmLidlessflip-chip;FFG/FFV:1.0mmFlip-chipfine-pitchNotes:1.EasyPath™solutionsprovideafastandconversion-freepathforcostreduction.3.SeeDS180,7SeriesFPGAsOverviewforpackagedetails.FootprintCompatibleFootprintCompatibleMemoryResourcesMaximumDistributedRAM(Kb)BlockRAM/FIFOw/ECC(36Kbeach)TotalBlockRAM(Kb)CommercialIndustrialI/OResourcesMaximumSingle-EndedI/OMaximumDifferentialI/OPairsIntegratedIPResourcesDSP48SlicesPCIe®Gen2(2)AnalogMixedSignal(AMS)/XADCPartNumberCMTs(1MMCM+1PLL)AvailableUserI/O:3.3VHRI/O,1.8VHPI/Os(GTX)2.HardblocksupportsPCIExpressBase2.1specificationatGen1andGen2datarates.Gen3supportedwithsoftIP.SlicesEasyPath™CostReductionSolutions(1)LogicCellsCLBFlip-FlopsConfigurationAES/HMACBlocksLogicResourcesSpeedGradesGTXTransceivers(12.5Gb/sMaxRate)ExtendedKintex®-7FPGAsKintex®-7FPGAsOptimizedforBestPrice-Performance(1.0V,0.95V,0.9V)©Copyright2014-2015Xilinx.Page3XC7V585TXC7V2000TXC7VX330TXC7VX415TXC7VX485TXC7VX550TXC7VX690TXC7VX980TXC7VX1140TXC7VH580TXC7VH870TXCE7V585T—XCE7VX330TXCE7VX415TXCE7VX485TXCE7VX550TXCE7VX690TXCE7VX980T———91,050305,40051,00064,40075,90086,600108,300153,000178,00090,700136,900582,7201,954,560326,400412,160485,760554,240693,120979,2001,139,200580,480876,160728,4002,443,200408,000515,200607,200692,800866,4001,224,0001,424,000725,6001,095,2006,93821,5504,3886,5258,1758,72510,88813,83817,7008,85013,2757951,2927508801,0301,1801,4701,5001,8809401,41028,62046,51227,00031,68037,08042,48052,92054,00067,68033,84050,760Clocking18241412142020182412188501,2007006007006001,0009001,1006003004085763362883362884804325282881441,2602,1601,1202,1602,8002,8803,6003,6003,3601,6802,52034——4————————22—23342311111111111111111111113636——56————————2848—808072964872GTZTransceivers(28.05Gb/sMaxRate)—————————816-1,-2-1,-2-1,-2-1,-2-1,-2-1,-2-1,-2-1,-2-1,-2-1,-2-1,-2-2L,-3-2L,-2G-2L,-3-2L,-3-2L,-3-2L,-3-2L,-3-2L-2L,-2G-2L,-2G-2L,-2G-1,-2-1-1,-2-1,-2-1,-2-1,-2-1,-2-1-1——Package(6)Dimensions(mm)FFG1157/FFV1157(7)35x350,600(20,0)0,600(0,20)0,600(0,20)0,600(20,0)0,600(0,20)FFG1761/FFV
本文标题:xilinx的7系芯片选型手册
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