Realtek-RTL8211C(L)-Layout-Guide-1.6

RTL8211C-GRRTL8211CL-GRINTEGRATED10/100/1000GIGABITETHERNETTRANSCEIVERLAYOUTGUIDE(CONFIDENTIAL:DevelopmentPartnersOnly)Rev.1.606July2009TrackID:JATR-1076-21RealtekSemiconductorCorp.No.2,InnovationRoadII,HsinchuSciencePark,Hsinchu300,TaiwanTel.:[phone].Fax:[phone](L)LayoutGuideIntegrated10/100/1000GigabitEthernetTransceiveriiTrackID:JATR-1076-21Rev.1.6COPYRIGHT©2009RealtekSemiconductorCorp.Allrightsreserved.Nopartofthisdocumentmaybereproduced,transmitted,transcribed,storedinaretrievalsystem,ortranslatedintoanylanguageinanyformorbyanymeanswithoutthewrittenpermissionofRealtekSemiconductorCorp.DISCLAIMERRealtekprovidesthisdocument“asis”,withoutwarrantyofanykind.Realtekmaymakeimprovementsand/orchangesinthisdocumentorintheproductdescribedinthisdocumentatanytime.Thisdocumentcouldincludetechnicalinaccuraciesortypographicalerrors.TRADEMARKSRealtekisatrademarkofRealtekSemiconductorCorporation.Othernamesmentionedinthisdocumentaretrademarks/registeredtrademarksoftheirrespectiveowners.USINGTHISDOCUMENTThisdocumentisintendedforthehardwareengineer’sreferenceontheRTL8211C(L)GigabitEthernettransceiver.Thougheveryefforthasbeenmadetoensurethatthisdocumentiscurrentandaccurate,moreinformationmayhavebecomeavailablesubsequenttotheproductionofthisguide.REVISIONHISTORYRevisionReleaseDateSummary1.02007/08/20Firstrelease.1.12008/02/05Revisedsection3.1RXClock(RXC),page5.1.22008/05/26Revisedsection9.1PCBLayout,page22.Revisedsection9.4TypicalSwitchingRegulatorPCBLayout,page28.Addedsection9.5EfficiencyMeasurement,page29.Revisedsection10.5PowerInductor,page31.1.32008/09/09Expandedpower,ground,andLEDplanelayoutsections.1.42009/03/17Revisedsection2.1Placement,page2.Revisedsection3.3RGMIISignals,page7.Addedsection4PCBStack-Up,page10.1.52009/06/03Revisedmatchinglengths/pairsspacingoftracesinsection3.2,page6.Addedtracesdistanceinformationinsection3.3,page7.Revisedsection9.1PCBLayout,page22.Revisedsection10.4Capacitors,page31.1.62009/07/06Correctedminortypingerrors.RTL8211C(L)LayoutGuideIntegrated10/100/1000GigabitEthernetTransceiveriiiTrackID:JATR-1076-21Rev.1.6TableofContents1.INTRODUCTION..............................................................................................................................................................12.DESIGNANDLAYOUTGUIDE.....................................................................................................................................22.1.PLACEMENT.................................................................................................................................................................22.2.MAGNETICS.................................................................................................................................................................32.3.CRYSTAL/OSC.............................................................................................................................................................32.4.TERMINATIONRESISTORSANDCAPACITORS...............................................................................................................42.5.FERRITEBEADSANDDE-COUPLINGCAPACITORS.......................................................................................................43.SIGNALANDTRACEROUTING..................................................................................................................................53.1.RXCLOCK(RXC).......................................................................................................................................................53.2.MDISIGNALS..............................................................................................................................................................63.3.RGMIISIGNALS..........................................................................................................................................................73.4.POWERSIGNALS..........................................................................................................................................................94.PCBSTACK-UP...............................................................................................................................................................104.1.OVERVIEW.................................................................................................................................................................104.2.FOUR-LAYERSTACK-UP(MOTHERBOARDAPPLICATION).........................................................................................104.3.SIX-LAYERSTACK-UP(NOTEBOOKAPPLICATION)...................................................................................................114.4.EIGHT-LAYERSTACK-UP(NOTEBOOKAPPLICATION)...............................................................................................125.GROUNDPLANELAYOUT..................................................................................................................