Mentor公司MBIST说明文档

MentorGraphicsCorporation2010AllrightsreservedThisdocumentcontainsinformationthatisproprietarytoMentorGraphicsCorporation.Theoriginalrecipientofthisdocumentmayduplicatethisdocumentinwholeorinpartforinternalbusinesspurposesonly,providedthatthisentirenoticeappearsinallcopies.Induplicatinganypartofthisdocument,therecipientagreestomakeeveryreasonableefforttopreventtheunauthorizeduseanddistributionoftheproprietaryinformation.SiliconTest&YieldAnalysisWhitepaperAGUIDETOPOWER-AWAREMEMORYREPAIRMAY2010AbstractThenumberofembeddedmemoriescontainedwithinanSoCcontinuestogrowrapidly.Thisgrowthhasdriventheneedforrethinkingmanufacturingteststrategiesasembeddedmemoriesrepresentinmostcasesadie’slargestcontributortoyieldlossduetotheverylargeareaanddensityoftheseregularcircuits.Asuccessfulmemorystrategymustincorporatesomeformofrepairmethodologyinordertoachieveprofitableyieldlevels.Thispaperexploreshowtoformulateaneffectiverepairmethodologybyleveragingavailablememoryredundancyschemesandadvancedon-chipmemoryrepaircapabilities.Theadaptationofmemoryrepairtechniquestotheincreasinguseofpowermanagementschemessuchasvoltageandpowerislandsisalsoexamined.SiliconTest&YieldAnalysisWhitepaperAGuideToPower-AwareMemoryRepair2TableofContentsINTRODUCTION.......................................................................................................................................3EFFECTIVETESTFOREFFECTIVEREPAIR...................................................................................4MEMORYREPAIRAPPROACHES.......................................................................................................5POWER-AWARESELF-REPAIR...........................................................................................................8CHOOSINGAREDUNDANCYSCHEME.............................................................................................9MANUFACTURINGREPAIRFLOW..................................................................................................11CONCLUSION.........................................................................................................................................12REFERENCES..........................................................................................................................................13APPENDIXA:GUIDETOCHOOSINGREDUNDANCYLEVELS.................................................14APPENDIXB:GUIDETOCHOOSINGNUMBEROFFUSES........................................................17SiliconTest&YieldAnalysisWhitepaperAGuideToPower-AwareMemoryRepair3IntroductionOneofthemostnotableconsequencesofthesemiconductorindustrymovingtodeepernanoscaletechnologynodesisthesignificantgrowthinboththenumberanddensitiesofembeddedmemories.Designshavemigratedfromcontainingahandfulofmemoriestocontaininghundredsandinsomecasesthousandsofmemoriesofalltypes.Thisexplosioninembeddedmemoriesisdrivingtheneedforrethinkingthemanufacturingteststrategyforthesedesigns[1].Embeddedmemoriesoftenrepresentadie’slargestcontributortoyieldlossbecauseoftheverylargeareaanddensityoftheseregularcircuits.Asuccessfulmemoryteststrategymustnowincorporatesomeformofrepairmethodologytoachieveprofitableyieldlevels.Anotherimportantandgrowingdesignconsiderationispowermanagement.Lowpowerrequirementsaffecttestintwoseparateways.First,anyfunctionalpowerconstraintsmustbemet(oratleastadequatelymanaged)duringtestexecution.Second,atestsolutionneedstobecompatiblewithwhateverlow-powerdesigntechniquesareused.Thiscompatibilityrequirementisparticularlyimportantwithregardtomemoryrepairbecausetherepairprocessmustgenerallyoperateinconjunctionwiththenormaloperationalmodeofthedevice.Formulatingapower-awarerepairmethodologyoftenrequirescombiningIPfrommemoryproviders,automationfromDFTproviders,aswellasIPanddatafromfoundries.Thisoftenrepresentsasignificantchallenge,asnotonlyarethereseveralcombinationsandchoicestoconsider,butmoreimportantly,thereisgenerallyverylittleinformationonhowtobestmakethesechoices.Thisdocumentattemptstoaddressthischallengebyexplainingthepower-awarememoryrepairprocessalongwithallofitscomponentsandtrade-offs.SiliconTest&YieldAnalysisWhitepaperAGuideToPower-AwareMemoryRepair4EffectiveTestforEffectiveRepairThememoryrepairprocesshasthreebasiccomponents:test,repairanalysis,andrepairdelivery.Acomprehensivetestcapabilityisfundamentalastherepairprocessisonlyeffectiveifitaddressesallexistingdefects.Inthegreatmajorityofcases,embeddedmemoriestodayaretestedwithBuilt-InSelf-Test(BIST).Initssimplestform,memoryBISTconsistsofanon-chipengineplacednexttoeachembeddedmemorythatwritesalgorithmicallygeneratedpatternstothememoryandthenreadsthesepatternsbacktodiscoverandpossiblyloganydefects.ThememoryBISTengineistypicallydesignedtogeneratepatternsbasedonapre-determinedmemorytestalgorithmencodedinafinitestatemachine(figure1a).Decreasesinprocessgeometriesandassociatedincreasesinmemorydensitiesareresultinginagrowingnumberofmemorydefecttypes.Manyofthesenewdefectmechanismsaredifficulttopredictandhenceproperl