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Features•High-performance,Low-powerAVR®8-bitMicrocontroller�AdvancedRISCArchitecture–130PowerfulInstructions–MostSingleClockCycleExecution–32x8GeneralPurposeWorkingRegisters–FullyStaticOperation–Upto16MIPSThroughputat16MHz–On-chip2-cycleMultiplier�NonvolatileProgramandDataMemories–8KBytesofIn-SystemSelf-ProgrammableFlashEndurance:10,000Write/EraseCycles–OptionalBootCodeSectionwithIndependentLockBitsIn-SystemProgrammingbyOn-chipBootProgramTrueRead-While-WriteOperation–512BytesEEPROMEndurance:100,000Write/EraseCycles–512BytesInternalSRAM–ProgrammingLockforSoftwareSecurity�PeripheralFeatures–Two8-bitTimer/CounterswithSeparatePrescalersandCompareModes–One16-bitTimer/CounterwithSeparatePrescaler,CompareMode,andCaptureMode–RealTimeCounterwithSeparateOscillator–FourPWMChannels–8-channel,10-bitADC8Single-endedChannels7DifferentialChannelsforTQFPPackageOnly2DifferentialChannelswithProgrammableGainat1x,10x,or200xforTQFPPackageOnly–Byte-orientedTwo-wireSerialInterface–ProgrammableSerialUSART–Master/SlaveSPISerialInterface–ProgrammableWatchdogTimerwithSeparateOn-chipOscillator–On-chipAnalogComparator�SpecialMicrocontrollerFeatures–Power-onResetandProgrammableBrown-outDetection–InternalCalibratedRCOscillator–ExternalandInternalInterruptSources–SixSleepModes:Idle,ADCNoiseReduction,Power-save,Power-down,StandbyandExtendedStandby�I/OandPackages–32ProgrammableI/OLines–40-pinPDIP,44-leadTQFP,44-leadPLCC,and44-padQFN/MLF�OperatingVoltages–2.7-5.5VforATmega8535L–4.5-5.5VforATmega8535�SpeedGrades–0-8MHzforATmega8535L–0-16MHzforATmega85358-bitMicrocontrollerwith8KBytesIn-SystemProgrammableFlashATmega8535ATmega8535LSummary2502KS–AVR–10/06Note:Thisisasummarydocument.AcompletedocumentisavailableonourWebsiteat(L)2502KS–AVR–10/06PinConfigurationsFigure1.PinoutATmega8535DisclaimerTypicalvaluescontainedinthisdatasheetarebasedonsimulationsandcharacteriza-tionofotherAVRmicrocontrollersmanufacturedonthesameprocesstechnology.MinandMaxvalueswillbeavailableafterthedeviceischaracterized.(XCK/T0)PB0(T1)PB1(INT2/AIN0)PB2(OC0/AIN1)PB3(SS)PB4(MOSI)PB5(MISO)PB6(SCK)PB7RESETVCCGNDXTAL2XTAL1(RXD)PD0(TXD)PD1(INT0)PD2(INT1)PD3(OC1B)PD4(OC1A)PD5(ICP1)PD6PA0(ADC0)PA1(ADC1)PA2(ADC2)PA3(ADC3)PA4(ADC4)PA5(ADC5)PA6(ADC6)PA7(ADC7)AREFGNDAVCCPC7(TOSC2)PC6(TOSC1)PC5PC4PC3PC2PC1(SDA)PC0(SCL)PD7(OC2)12345678910113332313029282726252423(MOSI)PB5(MISO)PB6(SCK)PB7RESETVCCGNDXTAL2XTAL1(RXD)PD0(TXD)PD1(INT0)PD2PA4(ADC4)PA5(ADC5)PA6(ADC6)PA7(ADC7)AREFGNDAVCCPC7(TOSC2)PC6(TOSC1)PC5PC444434241403938373635341213141516171819202122(INT1)PD3(OC1B)PD4(OC1A)PD5(ICP1)PD6(OC2)PD7VCCGND(SCL)PC0(SDA)PC1PC2PC3PB4(SS)PB3(AIN1/OC0)PB2(AIN0/INT2)PB1(T1)PB0(XCK/T0)GNDVCCPA0(ADC0)PA1(ADC1)PA2(ADC2)PA3(ADC3)78910111213141516173938373635343332313029(MOSI)PB5(MISO)PB6(SCK)PB7RESETVCCGNDXTAL2XTAL1(RXD)PD0(TXD)PD1(INT0)PD2PA4(ADC4)PA5(ADC5)PA6(ADC6)PA7(ADC7)AREFGNDAVCCPC7(TOSC2)PC6(TOSC1)PC5PC465432144434241401819202122232425262728(INT1)PD3(OC1B)PD4(OC1A)PD5(ICP1)PD6(OC2)PD7VCCGND(SCL)PC0(SDA)PC1PC2PC3PB4(SS)PB3(AIN1/OC0)PB2(AIN0/INT2)PB1(T1)PB0(XCK/T0)GNDVCCPA0(ADC0)PA1(ADC1)PA2(ADC2)PA3(ADC3)PLCCNOTE:MLFBottompadshouldbesolderedtoground.3ATmega8535(L)2502KS–AVR–10/06OverviewTheATmega8535isalow-powerCMOS8-bitmicrocontrollerbasedontheAVRenhancedRISCarchitecture.Byexecutinginstructionsinasingleclockcycle,theATmega8535achievesthroughputsapproaching1MIPSperMHzallowingthesystemdesignertooptimizepowerconsumptionversusprocessingspeed.BlockDiagramFigure2.BlockDiagramINTERNALOSCILLATOROSCILLATORWATCHDOGTIMERMCUCTRL.&TIMINGOSCILLATORTIMERS/COUNTERSINTERRUPTUNITSTACKPOINTEREEPROMSRAMSTATUSREGISTERUSARTPROGRAMCOUNTERPROGRAMFLASHINSTRUCTIONREGISTERINSTRUCTIONDECODERPROGRAMMINGLOGICSPIADCINTERFACECOMP.INTERFACEPORTADRIVERS/BUFFERSPORTADIGITALINTERFACEGENERALPURPOSEREGISTERSXYZALU+-PORTCDRIVERS/BUFFERSPORTCDIGITALINTERFACEPORTBDIGITALINTERFACEPORTBDRIVERS/BUFFERSPORTDDIGITALINTERFACEPORTDDRIVERS/BUFFERSXTAL1XTAL2RESETCONTROLLINESVCCGNDMUX&ADCAREFPA0-PA7PC0-PC7PD0-PD7PB0-PB7AVRCPUTWIAVCCINTERNALCALIBRATEDOSCILLATOR4ATmega8535(L)2502KS–AVR–10/06TheAVRcorecombinesarichinstructionsetwith32generalpurposeworkingregisters.All32registersaredirectlyconnectedtotheArithmeticLogicUnit(ALU),allowingtwoindependentregisterstobeaccessedinonesingleinstructionexecutedinoneclockcycle.TheresultingarchitectureismorecodeefficientwhileachievingthroughputsuptotentimesfasterthanconventionalCISCmicrocontrollers.TheATmega8535providesthefollowingfeatures:8KbytesofIn-SystemProgrammableFlashwithRead-While-Writecapabilities,512bytesEEPROM,512bytesSRAM,32generalpurposeI/Olines,32generalpurposeworkingregisters,threeflexibleTimer/Counterswithcomparemodes,internalandexternalinterrupts,aserialprogram-mableUSART,abyteorientedTwo-wireSerialInterface,an8-channel,10-bitADCwithoptionaldifferentialinputstagewithprogrammablegaininTQFPpackage,aprogram-mableWatchdogTimerwithInternalOscillator,anSPIserialport,andsixsoftwareselectablepowersavingmodes.TheIdlemodestopstheCPUwhileallowingtheSRAM,Timer/Counters,SPIport,andinterrup
本文标题:ATMEGA8535-16AU中文资料
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